The IC Design and Reticle Layout Process Development Engineer will be responsible to help support the development of manufacturable, repeatable, and high yielding processes for state-of-the-art highly specialized devices in the fields of Aerospace, Defense, Bioelectronics, and High-Speed Communications.  

• Partner with Integration Engineers, Customers, and Other Development Engineers to execute Manufacturing and Development programs, and adjust or optimize wafer layout for yields maximization, throughput and performance. 
• Partner with Product Engineering and Integration to help ensure effective new products introductions as well as consistent device performance and quality. 
• Guide and assist Customers and Integration Engineers through challenging manufacturing layout design rules. 
• Perform all tasks related to reticle design and mask layout supporting semiconductor manufacturing leveraging 193 nm scanners, i-line steppers, and 1x proximity g-line technologies.
• Establish and maintain layout design rules related to metrology and process constraints. Metrology design rules include CDSEM, overlay, ellipsometry, profilometry, and electrical tests. Process design rules include creation of keep-out areas, minimum CDs, overlay constraints, and the generation of dummy load structures to maintain uniformity and process consistency.
• Expand and maintain library of reusable unit components or structures with CAD software.
• Analyze GDS layout files, verify quality and disposition tape-out / manufacturing of reticles based on data and pass/fail criteria. 
• Report and summarize results from the analysis and provide guidance to Customers and the Integration Engineering Team. 
• Provide effective pass-downs to support uninterrupted operation in the Photolithography area.
• Sustain and improve processes for effective and efficient mask tape-out and fabrication. 
• Organize and track all versions of reticle layouts for internal and external customer products. Maintain database of existing mask sets. 
• Partner with reticle suppliers, customers and Integration engineers to improve tape-out cycle time and reticle manufacturing quality control. 
• Using Document Control, Process Work Instructions, and Manufacturing Execution Systems, preserve working knowledge of all codes and standards applicable to reticles design and layout. 
• Assure that the manufactured reticles conform to specifications and application requirements.

Bachelor’s degree in Electrical Engineering, Computer Science, or Physics with 5+ years of relevant experience, OR
Master’s degree in Electrical Engineering, Computer Science, or Physics with 2+ years of relevant experience.

• IC design, layout and reticle tape-out experience for a commercial foundry using CAD software
• Experience with commercial layout software (Cadence, dw-2000, Mentor Graphics)
• Deep understanding of DRC rules and their creation
• Strong problem solving and critical thinking skills
• Basic understanding of algebraic concepts
•  Data extraction, analysis, and reporting experience
• Basic understanding of Semiconductor processing
• Ability to troubleshoot basic problems and address root causes
• Ability to plan and prioritize activities, perform and monitor multiple overlapping tasks/operations to meet goals and timelines
• Strong communication, presentation and documentation skills
• Must be able to work effectively in a dynamic start-up environment